Every ampere that flows through a power board passes through copper, and in SMT assembly the last stretch of that journey often runs through stamped copper strip: battery and capacitor tabs, busbar links, co
ector terminals, fuse-clip straps, and shunt plates. Sizing that strip correctly is a balancing act among current capacity, voltage drop, mechanical strength, and cost. This guide explains how thickness and width set ampacity, how to derate for temperature rise, and what to verify before committing the design to production.
Why Ampacity Governs Copper Strip Selection
Ampacity – the continuous current a conductor can carry without exceeding a temperature limit – is the first filter in copper strip selection. Exceed it and the strip heats, oxidizes, softens, and can stress the solder joints and insulation around it. Undershoot it and you pay for copper you do not need, or you force the layout wider than the footprint allows. In SMT power boards, strip applications range from 5 A sensor ground straps to 60 A or more in battery distribution, so the sizing window is wide and the penalty for guessing is real. A strip that looks fine on the schematic can fail in the field if the enclosure traps heat or a plating layer raises joint resistance.
How Thickness, Width, and Temper Shape Current Capacity
The Ampacity Equation in Practice
Current capacity scales with cross-sectional area and with the allowable temperature rise. A common starting point is the IPC-2221 chart for external conductors, which for a 10 degree C rise allows roughly 1 A per 0.18 mm2 of copper cross-section at moderate trace widths. Stamped strip, however, enjoys better heat spreading than a narrow PCB trace because its full surface radiates and conducts into air, adjacent pads, and any metal housing it touches. In practice, a 0.3 mm by 6 mm strip (1.8 mm2) comfortably carries 15 to 20 A continuous with a modest rise, while the same cross-section squeezed into a 1 mm-wide PCB trace would run far hotter. Use the IPC numbers as a conservative floor, then refine with a thermal model or sample testing at rated current.
Temperature Rise and Derating
The allowable rise depends on the environment. Inside a sealed enclosure next to a hot MOSFET, budget 20 to 30 degrees C of rise on top of a 70 to 85 degree C ambient. That typically forces derating of 20 to 40 percent versus free-air figures. Half-hard and hard temper strip also loses spring strength as it approaches 150 degrees C, so high-temperature current paths should specify stress-relieved tempers or higher-recoil alloys rather than simply adding width. Continuous cyclic loading deserves extra margin: repeated thermal cycling fatigues the strip at bends and stamped corners long before steady-state heating becomes a problem.
IR Drop and the Voltage Budget
Ampacity keeps the strip alive; IR drop keeps the load powered. The resistivity of electrolytic copper is about 1.7 micro-ohm cm, so a 30 mm path of 0.3 mm by 6 mm strip adds roughly 280 micro-ohms – negligible at 10 A, but 28 mV at 100 A. When the path feeds a sensing line, a shunt measurement, or a low-voltage rail, compute the drop explicitly. Upsizing thickness is usually smarter than upsizing width, because thickness adds cross-section without consuming board space. Keep plating in mind as well: tin and nickel layers add little bulk conductivity, but they set the contact resistance at terminals and solder joints, which can dominate the total path resistance in high-current assemblies.
Where Strip Beats Etched Copper
Thick PCB copper is practical up to about 3 to 6 oz per square foot, after which etching tolerances and cost climb steeply. Stamped strip covers the gap above that: 0.5 mm to 2 mm busbar stock carries currents that would need impractical board area, and it can be formed into standoffs, links, and three-dimensional paths that a flat board ca
ot provide. Strip also decouples the current path from layer count, letting signal layers stay dense while power rides on discrete conductors. For prototypes, laser-cut strip avoids tooling cost; for volume, progressive die stamping brings per-piece cost down sharply while holding edge quality that matters for plating uniformity.
Stamping, Plating, and Joining Thick Strip
Thickness interacts with manufacturing. Strip above 0.5 mm demands larger die clearances, typically 8 to 12 percent of thickness per side, sharper wear monitoring, and higher press to
age. Very thick busbar strip is often better laser cut and ti
ed than fine-blanked. Plating should scale with duty: 3 to 5 microns of tin is common for solderable tabs, while high-cycle co
ector interfaces may specify 0.76 microns of gold over 1.3 to 2 microns of nickel to control fretting and pore corrosion. For joining, resistance welding and laser welding handle thick strip well; soldering thick strip onto SMT pads needs generous pad area and a preheat profile that prevents cold joints and wicking the solder out of the joint before it forms.
A Practical Sizing Workflow
Start with the load current and duty cycle, add 25 percent headroom, and choose a trial cross-section from the derated ampacity figure. Check IR drop against the voltage budget, then verify mechanically: can the stamp survive insertion forces, and does the temper retain contact force at maximum temperature? Prototype with the actual temper and plating, run a thermocouple survey at rated current inside the real enclosure, and adjust. Suppliers of SMT-grade strip can provide temper, conductivity, and plating data sheets that shorten this loop considerably – ask for stress-relief curves, not just tensile numbers, when the path runs hot.
Conclusion
Treat copper strip ampacity as a design input, not an afterthought. Thickness buys capacity without footprint, width buys heat spreading, and temper buys mechanical life. Balancing the three – and validating with real thermal data in the final enclosure – turns a stamped strip from a potential failure point into the most reliable conductor on the board.
